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13/07/2009
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How deep sleep modes are helping to tackle the challenge of power constrained applications.
 One of the inherent benefits of cmos technology is that it only consumes power when changing state, which gives it its 'low power' status compared with other forms of semiconductor technology. It follows, therefore, that as clock frequency rises, so does the active power consumed by a digital ic and the longer it remains inactive, the lower the power consumed.
While that holds true in theory, the reality is that every transistor in a digital ic leaks a small amount of current while the gate is inactive and the transistors are supposed to be either fully on or fully off. As every logic gate in a cmos circuit requires at least two transistors operating in complementary fashion to one another (hence the name) and gate counts are increasing exponentially, it's easy to see how static power consumption has become more important with each generation.
While the industry has lived with leakage current since its early days, leakage has been a small proportion of overall consumption and more of an annoyance than a design constraint – until now. Today, with greater pressure on manufacturers to consume less power and increased demand from consumers for more performance, the industry can no longer afford to ignore it.
For one class of device the issue of static power is even more crucial. The trend toward portable and battery powered devices means power consumption is a fundamental in many applications, imposing a strict restriction on power envelopes. This is apparent in power constrained devices; a new class of application that is typically battery powered and often designed to last only as long as a single charge. Such devices include sealed units, such as hazardous chemical or gas monitors, smoke alarms and carbon monoxide detectors. It may also include equipment used in the home by those with illnesses which require careful, regular and accurate monitoring.
Increasingly, this category includes devices that are sealed for security reasons – such as remote central locking car fobs, door entry systems or asset tracking devices. These applications have no on/off switch and power may only be available in the form of a single charge, yet the device must operate for thousands of hours – perhaps tens of years – in order to fulfil its design parameters.
To achieve years of service on a single battery, the devices spend most of their time in standby mode. Unlike applications that are intended to be switched off when not in use, these applications demand instant start up, often from an external stimulus or scheduled activity, without losing vital data.
It's a significant design challenge for any engineer, one made all the more difficult by the constraints on power that may be consumed while in standby mode. Only by consuming almost no power in standby mode can any electronic circuit hope to approach years of use from a single charge.
Most general purpose microcontrollers – although designed for low power when running – aren't capable of reaching the extreme low standby power consumption dictated by these applications. However, the development of an extreme low power transistor process, coupled with power saving architectural innovations, has allowed Microchip to produce the world's lowest standby current mcu, which consumes less than 20nA when in standby mode. Capable of operating from a supply voltage as low as 1.8V, this equates to 20 years or more of use on a single battery or charge.
The innovation, called nanoWatt XLP technology, has been introduced in Microchip's latest additions to its 8bit and 16bit PIC families. It incorporates three important developments: an extremely low power architecture; a Deep Sleep standby mode for higher complexity products; and several extreme low power peripherals for periodic wake ups. All work together to bring greater performance to power constrained applications.
However, nanoWatt XLP technology has implications at the transistor level, combining recognised low power techniques – such as variable threshold voltages – with power gating methodologies, which physically remove power from large parts of the chip when they're not needed. By physically removing power, thousands of transistors that would normally contribute to leakage current are isolated electrically, lowering the current consumed in standby mode. The result is mcus that consume less than 20nA when in Deep Sleep mode; significantly less than other mcus currently available.
One of the major parts of nanoWatt XLP technology is the Deep Sleep stand by mode. Microchip's research shows that up to 90% of all mcu applications use either the watchdog timer (wdt) or real time clock/calendar (rtcc) to schedule events and bring an mcu out of sleep mode. With Deep Sleep, Microchip's engineers have effectively implemented the most important elements of mcu design in the industry's lowest power architecture.
When the device enters Deep Sleep mode, power is removed from almost all of the mcu's peripherals, as well as most registers. However, the rtcc and wdt circuits remain active. Although coming out of Deep Sleep is effectively a power on reset for much of the device, static power consumption is practically eradicated. Those circuits that remain active are implemented using extreme low power design techniques.
The mcus are 'woken up' from Deep Sleep mode either by the wdt or rtcc, for scheduled interrupt service routines, by the Deep Sleep Brownout Reset or by INT0 in the event of an unscheduled activity. The breakeven point for effective use of the Deep Sleep mode – offsetting the small power surge needed to reinstate registers against the power saved while in Deep Sleep – can be as little as a few hundred microseconds as target applications will typically spend several minutes between bursts of activity. However, the wdt can operate for up to 19 days without reset and the rtcc can be set to run for an entire year in Deep Sleep mode before waking the device.
The Deep Sleep mode is accompanied by more conventional standby modes. In some cases, it may be advantageous to sacrifice some power savings in exchange for greater flexibility. For example, if uart wake up on receive is needed to act as a wake up source, then a standard sleep mode is most appropriate. If other peripherals are needed, then either Idle or Doze mode can be used. All sleep modes on PIC mcus offer significant power savings, but only those featuring nanoWatt XLP technology offer Deep Sleep mode.
As more applications become constrained by their power budgets, the use of extreme low power technologies will increase, overtaking the need for performance at any cost. With nanoWatt XLP technology, Microchip is addressing the industry demand for more flexible solutions to power constrained applications.
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Author
Jason Tollefson, product marketing manager for Microchips’ advanced microcontroller and architecture division
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