|
More for less
|
20/06/2008
|
| |
New process technology nodes appear every 18 months or so; Moore’s Law positively requires it. Half nodes, unsurprisingly, appear more quickly. Such is the case with TSMC’s recent announcement of a 40nm cmos process, providing a halfway house between 45 and 32nm.
One thing of which you can be sure with all process technology developments is that programmable logic will be probably the first products to take advantage of life at the ‘bleeding edge’.
The benefits accrue to both sides. For the foundry, programmable logic is a good technology to run on a new process; it’s pretty uniform, which means the process can be qualified relatively quickly. And the chips are large and easy to debug. For the logic supplier, ‘bleeding edge’ technology means faster devices and, importantly, lower dynamic power consumption. Alongside those benefits comes the ability to pack more transistors into the same area of silicon that was used on the last process or to shrink the same number of transistors into a smaller area.
|
| |
Author
Graham Pitcher
|
| |
| |
|
This material is protected by Findlay Publications copyright 2008.
See Terms and Conditions.
One-off usage is permitted but bulk copying is not.
For multiple copies contact the sales team.
|
| |
|
| Email this article |
| |
|
|
|
|