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Cadence acquires Chip Estimate 12/03/2008
 
chip design, die size estimate, chip power estimate In a move designed to improve decision making in the early stages of chip design, Cadence has acquired Chip Estimate. The latter’s products enable design teams to predict the die size, yield, power consumption, performance and cost of chips based on almost any architecture and process node.
Alongside its chip planning technology, Chip Estimate has developed ChipEstimate.com, which hosts more than 175 IP suppliers and foundries and more than 6000 IP components.
“We are excited to be combining our capabilities with an industry leader,” said Adam Traidman, president and ceo of Chip Estimate. "Chip Estimate customers will benefit significantly from the synergies and opportunities created by the combination of the companies, and together we can deliver even greater value to the electronics design community."
“The Chip Estimate technology and web portal are great complements to the Cadence solutions portfolio and fit perfectly with our strategy to partner with the design IP industry, instead of compete with them,” said Craig Johnson, Cadence’s corporate vice president, marketing and strategy, pictured.
 
Author
Graham Pitcher
 
 
Supporting Information
 
 http://www.cadence.com
 
 http://www.chipestimate.com
 
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