|
Growing ambitions
|
07/03/2008
|
| |
Almost religiously, the semiconductor industry has managed to adhere to Intel founder Gordon Moore’s belief – laid out 40 years ago – that the number of transistors on a given piece of silicon should double every 18months.
Moore’s Law is enshrined in the International Technology Roadmap for Semiconductors. One date on the road map is beginning to concentrate the minds of those developing semiconductor manufacturing processes and that is 2012, when the 22nm node is expected to enter production.
Why is that? The answer is that cmos is not expected to scale beyond 22nm – it is a ‘brick wall’ imposed by the Laws of Physics. Anything beyond 22nm will have to use some other materials – and the scale of the problem is illustrated by the fact that the next node – 16nm – is not anticipated to arrive before 2018.
Nevertheless, there is nothing like a challenge to motivate researchers in the electronics industry. One project recently launched by the European Commission under its Seventh Framework Programme (FP7) is DUALLOGIC, which is working on the basis that pmos transistors – made from germanium – and nmos devices – fabricated from III-V compound semiconductor materials – can be integrated on to a silicon substrate.
|
| |
Author Graham Pitcher
|
| |
| |
|
This material is protected by Findlay Publications copyright 2008. See Terms and Conditions. One-off usage is permitted but bulk copying is not. For multiple copies contact the sales team.
|
| |
|
| Email this article |
|
|