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Where’s the solution?
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08/02/2008
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The proliferation of NAND flash architectures, the migration to deep submicron process technologies and the continual introduction of new features have made NAND subsystem design more challenging.
Designers integrating NAND have three options: build discrete solutions using flash controllers and separate NAND devices; use embedded NAND controllers, along with separate NAND devices; or buy managed NAND solutions.
NAND flash was once dominated by Samsung and Toshiba, who used similar architectures, a 512byte sector size and similar command interfaces and packaging. System designers with a simple controller could use the ATA/IDE bus to translate address and data signals into memory accesses and swap out one vendor’s devices for the other.
However, the technology has evolved and diversified. As densities passed 4Gbit, manufacturers found the 512byte programming page was no longer optimal, moving instead to a 2kbyte page. More recently, some have adopted a 4kbyte page. At the same time, manufacturers have moved to multilevel cell (MLC) architectures, storing up to 4bit per cell.
Whilst these features and enhancements are intended to improve performance, they present problems for those looking to multiple source NAND flash.
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Author
Yuping Chung
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